Computer Architecture : Chapter 1

Pipe-lining - The Big Daemon Part 1


What is Pipe-Lining ?

Implementation where multiple instructions are simultaneously overlapped in execution.
  • Instruction Processes has 'n-stages'.
  • Overlapped different instructions working on different phases.
Non-Pipelined System
Pipelined System











As the diagram explains instructions execute one by one in non-pipelined system where as instruction execution is overlapped in pipelined system. So, pipelining speeds up the instruction execution than non-pipelining. 

Speed-Up  =  ( time-taken-for-non-pipelining ) / (time-taken-for-pipelining)
Speed-Up  =  ( P * n * T) / [ ( n * T ) + T * ( P - 1 ) ]

[ P = number of instructions, n = number of micro instructions per instruction, T = time per micro instruction ]

So, when P -> infinity, then speed up is approximately becomes 'n'. By using pipelining 1-instruction will come out in T-Seconds so that 1-clock is equal to T-seconds. Pipelining will bring the CPI (cycles-per-instruction) to 1.

Even though pipeline can have any number of stages in a typical von-neuman machine we will use 5-stages. 



  1. Instruction Fetch : Fetching the Instruction from Memory.
  2. Instruction Decode : Decoding the Instruction.
  3. Execution : Execute the ALU operations.
  4. Memory Access : Access the Memory if needed.
  5. Write Back : Write Back the result to Memory.
 

 

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